Design of digital hard disk recorder based on MPC8250

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introduction
In just a few years of development, digital hard disk recorders (DVRs) have gradually replaced the dominant position of traditional analog video equipment and become the mainstream of the surveillance market, relying on its powerful digital and network functions. Its application has evolved from the initial financial field to various applications such as transportation, buildings, public security, prisons, plazas, residential areas, computer rooms, environments, examination rooms, etc., as long as it is intended to monitor the image and sound, it will be applied to the DVR system. .
At present, there are two main product technology trends for digital hard disk recorders:
One is a plug-in digital hard disk recorder based on a PC Windows platform; the other is a digital hard disk recorder based on embedded system technology. Embedded DVRs are increasingly favored by the market due to their high reliability, stability, anti-virus intrusion and other characteristics, and are the main trend of current development.
There are two main design solutions for embedded DVR products: one is DSP solution (such as Philips audio and video processing IC plus Trimedia DSFP); the other is ASIC solution (such as image processing IC chip based on Vweb2010 MPEG-IV IC or INTTIME IC) Development). The encoding quality and processing performance of the ASIC solution depend on the IC developer, and the IC currently on the market does not support 4CIF (704×576) MPEG4 encoding.
The mainstream market for DSP design mainly uses Philips' Trime-dia DSP, but its processing capability is relatively weak, and it is impossible to achieve 4CIF high-definition encoding of MPEG-4. This system uses the EQUATOR BSP-15 DSP solution to design high-end embedded digital hard disk recorders with high definition.

1 System Design The main task of digital DVR is to convert the analog audio and video signals into A/D image signals without compression, and then compress and encode the image data through DSP or ASIC chip with image processing function. The compression-encoded digital image data is stored in a large-capacity storage device such as a hard disk, or the remote image is monitored in real time through a network. The user can easily, conveniently retrieve, play back and back up the stored video data through the network or remote control OSD menu mode.
1.1 Overall hardware design
1.1.1 Introduction to MPC08250
Embedded system selection of processors mainly need to consider the following aspects: processor performance; development tools supported by the processor and supported operating systems; past development experience and processor cost; code Compatibility and algorithm complexity, etc. In this system, Motorola's MPC8250 was selected as the system's main control processor.
The MPC8250 is one of the MPC82XX family of microprocessors from Motorola's embedded MPC860. Based on the PowerQUICC structure, the MPC8250 is mainly composed of a PowerPC core, a system interface unit SIU, and a communication processing unit CPM. It supports 60x bus, its data line is 64 bits, the address line is 32 bits; supports PCI/LOCAL bus, its data line is 32 bits, and the address line is 32 bits. The core operating clock is up to 300 MHz and the CPU operating clock is up to 200 MHz. The internal structure of the MPC8250 is shown in Figure 1.

1.1.2 Introduction to BSP-15 Equator Technologies' MAP-BSP-15 is a high-performance DSP chip for audio and video media applications. The latest MAP-BSP-15 400 MHz processing capacity is up to 40 GOPS (for video coding). The system structure of this series of chips is especially suitable for applications such as audio and video codec, and its rich audio and video signal interface makes it easy for users to design the system.
MAP-BSP-15 mainly includes a very long instruction word processor core (The VLIW core), a programmable bit stream coprocessor (TheVLx), a video filtering coprocessor, a display refresh controller and a rich digital I/O. Interface, etc. MAP~CA supports various video, image and signal compression and decompression implemented by software. The algorithm implemented by this software has great advantages over hardware implementation, and the upgrade is very convenient.
1.1.3 Hardware Overall Design The system needs to realize 8-channel audio and video synchronous recording. BSP-15 has the performance of processing 2 channels of audio and video signals at the same time. Therefore, 4 BSP-15 audio and video encodings are required. At the same time, 1 BSP is required. -15 is an audio and video decoder, and BSP-15 and MPC8250 use PCI communication to exchange data. Therefore, the overall system circuit design is very complicated. According to the structural design requirements of the chassis, it can meet the rack installation of 2U equipment and desktop installation. Therefore, the system is divided into two boards of two layers, the CPU main control board and the codec board. A European socket connector is connected between the CPU main control board and the codec board.
The CPU main control board mainly includes MPC8250 and its peripheral circuits, including SDRAM, BOOT ROM, Flash, network processing interface circuit and hard disk interface circuit. The basic principle diagram is shown in Figure 2.


The codec board mainly includes five BSP-15 and its peripheral circuits, such as SDRAM, audio and video A/D conversion circuit, D/A conversion circuit and picture division circuit. The basic principle diagram is shown in Figure 3.
1.2 Software overall design The main function of DVR is to realize independent compression coding of multi-channel video and audio data, store the encoded digital image data on the hard disk, and store the image data at any time by using commands such as remote control, panel, or Ethernet. Communication method, fast, convenient retrieval, backup, playback of hard disk data. At the same time, it also has conditional recording functions such as motion detection, timed alarm, etc., and has the function of circulating the oldest data when the hard disk is used up.
After system function requirements and data flow analysis, the system is decomposed into system management subsystem, communication subsystem, PCI communication management subsystem, video data storage, retrieval subsystem and OSD menu subsystem, each subsystem consists of one or more Tasks are managed.
The system management subsystem mainly realizes the control of the system start and stop of the recording and the realization of the scheduling algorithm; the allocation and scheduling of the overall resources of the system; and the synchronization of control and data exchange with other subsystems.
The communication subsystem includes more content, including TCP/IP-based Ethernet communication, serial port-based RS232 or RS485 communication. The subsystem mainly includes the following modules: RS232 panel communication module, RS485 cloud mirror and other control modules, network client communication module and UDP multicast or unicast communication module.
The PCI communication management subsystem is mainly responsible for PCI communication with BSP-15, and its contents include data exchange and signaling exchange and control.
The storage and retrieval subsystem of the video data is the data hub of the entire system, and its basic design idea is introduced in detail here. The subsystem is responsible for storing the BSP-15 encoded image data according to a system-defined data storage algorithm, and processing data retrieval, backup, and playback commands of the remote PC client, local remote controller or panel operation request, and the retrieved video will be retrieved. Record file lists and video data files to other processing subsystems. Mainly complete the following functions:
â—† IDE storage of image data;
â—†Retrieval of the recording record file list;
â—† IDE retrieval of video data files;
â—† IDE hard disk management, including hard disk switching, hard disk booting, hard disk read and write operations control.
The subsystem includes the following processing modules: a write image data processing module, a read image data processing module, and a data retrieval processing module.
(1) Write image data processing The image encoded data sent from BSP-15 is written to the hard disk according to the defined format and specification, and in order to reduce the influence of frequent reading and writing on the service life of the hard disk, the frequent hard disk seek is minimized. operating. In the writing process of image data, in order to quickly locate and quickly retrieve video data, it is necessary to establish a necessary data block index mapping relationship in the system. The switching control of the hard disk, in the case of no data playback or backup, generally only one hard disk is in the IDLE working state, and the other disks are in the STANDBY standby state. In the STANDBY state, the motor of the hard disk is stopped, and the switching time from the STANDBY state to the IDLE state generally takes 7-8 s. In order to avoid data overflow caused by waiting for the hard disk to start for too long, when the IDE hard disk is about to be full, the next disk to be written is started up, and the STANDBY state is switched to the IDLE state, and the IDE hard disk is full. After that, the IDLE state is switched to the STANDBY state, which not only reduces the power consumption of the system operation, but also improves the service life of the IDE.
(2) Read image data processing According to the panel operation of the 0SD or the remote network client request, the image data is read out from the hard disk, and the retrieved result data is sent to the BSP-15 codec subsystem according to the source of the command to realize local playback. Function, or send the retrieved data to the communication subsystem to the network medium for backup and playback of the remote network. And the data flow control during playback (such as the hard disk needs to take data faster), to avoid data underload or overflow.
(3) Data retrieval processing The retrieval processing module is equivalent to the external communication window of the subsystem, and is responsible for receiving requests from other subsystems, preprocessing the recording data retrieval request from the network or the local OSD menu, and searching according to the data in the system. Process the algorithm to quickly calculate whether the data request is met. If there is a data index that meets the requirements, which location of the hard disk is quickly located, and the result is distributed to the corresponding read processing module for further data read processing to achieve backup or playback of the recorded data. At the same time, the processing module is also responsible for the consistency maintenance of the image data and the index list file in the IDE.
2 Summary <br> Both the MPC8250 and the BSP-15 are high-performance microprocessors with very powerful processing capabilities. The author has mastered the various functions and processing performance of MPC8250 and BSP-15 through specific practice, and summarized some experiences and lessons in the development process, which laid a solid technical foundation for the serialization of products. After testing and testing, the system is stable and reliable; in terms of performance, it can simultaneously support 8-channel image monitoring, 4-way network user real-time playback and local user's 4-way simultaneous decoding and playback, and passed the type test of the Ministry of Public Security security products. The product has been successfully launched.

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